Milestone-Proposal:Whirlwind Computer: Difference between revisions
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The U.S. Air Force provided substantial financial support for Whirlwind applications and it was a key component in the design of the Air Force's SAGE (Semi-Automatic Ground Environment) air defense system in the 1950s. Research projects at Lincoln Laboratory resulted in the further development of two additional computers, the MTC (memory test computer) and TX-0 (transistor computer), by Group 63 of Lincoln Lab, Division 6. | The U.S. Air Force provided substantial financial support for Whirlwind applications and it was a key component in the design of the Air Force's SAGE (Semi-Automatic Ground Environment) air defense system in the 1950s. Research projects at Lincoln Laboratory resulted in the further development of two additional computers, the MTC (memory test computer) and TX-0 (transistor computer), by Group 63 of Lincoln Lab, Division 6. | ||
Whirlwind I computer, was shut down on May 29, 1959. It was leased by the Navy to the Wolf Research and Development Corporation of Massachusetts, and was disassembled and moved out of the Barta building in the spring of 1960. Computer artifacts from Whirlwind I and related Whirlwind projects are held by the Massachusetts Institute of Technology Museum and the Computer History Museum, Mountain View, California. | Whirlwind I computer, was shut down on May 29, 1959. It was leased by the Navy to the Wolf Research and Development Corporation of Massachusetts, and was disassembled and moved out of the Barta building in the spring of 1960. Computer artifacts from Whirlwind I and related Whirlwind projects are held by the Massachusetts Institute of Technology Museum and the Computer History Museum, Mountain View, California. | ||
REFERENCES AND SOURCES | REFERENCES AND SOURCES | ||
1. Project Whirlwind Collection, MC 665, box _. Institute Archives and Special Collections, Massachusetts Institute of Technology, Cambridge, Massachusetts | 1. Project Whirlwind Collection, MC 665, box _. Institute Archives and Special Collections, Massachusetts Institute of Technology, Cambridge, Massachusetts. | ||
2. Wikipedia. ":Whirlwind | http://libraries.mit.edu/archives/research/collections/collections-mc/mc665.html | ||
2. Wikipedia. ":Whirlwind Computer". http://en.academic.ru/dic.nsf/enwiki/47556# | |||
http://www.ieeeghn.org/wiki/index.php/Magnetic-Core_Memory | |||
3. IEEE Global History Network "Magnetic-Core Memory". | |||
http://www.ieeeghn.org/wiki/index.php/Magnetic-Core_Memory | |||
DESIGN AND CONSTRUCTION | |||
By 1947, Forrester and collaborator Robert Everett completed the design of a high-speed stored-program computer. | By 1947, Forrester and collaborator Robert Everett [http://www.cs.stthomas.edu/faculty/resmith/papers/WhirlwindR-127.pdf completed the design] of a high-speed stored-program computer for this task. Most computers of the era operated in "bit-serial" mode, using single-bit arithmetic and feeding in large words, often 48 or 60 bits in size, one bit at a time. This was simply not fast enough for their purposes, so Whirlwind included sixteen such math units, operating on a complete 16-bit word every cycle in "bit-parallel" mode. Ignoring memory speed, Whirlwind was essentially sixteen times as fast as other machines. Today almost all CPUs do arithmetic in "bit-parallel"; some CPUs extend the idea to larger 32- or 64-bit words. | ||
The word size was selected after some deliberation. The machine worked by passing in a single address with almost every instruction, thereby reducingFact|date=April 2008 the number of memory accesses. For operations with two operands, adding for instance, the "other" operand was assumed to be the last one loaded. Whirlwind operated much like a reverse Polish notation calculator in this respect; except there was no operand stack, only an accumulator. The designers felt that 2000 words of memory would be the minimum usable amount, requiring 11 bits to represent an address, and that 16 to 32 instructions would be the minimum for another 5 bits -- and so it was 16-bits. Nevertheless the small word size led John von Neumann to conclude the machine would be worthless. | The word size was selected after some deliberation. The machine worked by passing in a single address with almost every instruction, thereby reducingFact|date=April 2008 the number of memory accesses. For operations with two operands, adding for instance, the "other" operand was assumed to be the last one loaded. Whirlwind operated much like a reverse Polish notation calculator in this respect; except there was no operand stack, only an accumulator. The designers felt that 2000 words of memory would be the minimum usable amount, requiring 11 bits to represent an address, and that 16 to 32 instructions would be the minimum for another 5 bits -- and so it was 16-bits. Nevertheless the small word size led John von Neumann to conclude the machine would be worthless. | ||
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Construction of the machine started the next year, an effort that employed 175 people including 70 engineers and technicians. Whirlwind took 3 years to build and first went online on April 20, 1951. The project's budget was $1 million a year, and after three years the Navy had already lost interest. The USAF picked up the work under "Project Claude". | Construction of the machine started the next year, an effort that employed 175 people including 70 engineers and technicians. Whirlwind took 3 years to build and first went online on April 20, 1951. The project's budget was $1 million a year, and after three years the Navy had already lost interest. The USAF picked up the work under "Project Claude". | ||
The core of the machine | |||
Speed of the original design (20 KIPS) turned out to be too slow to be very useful, and most of the problem was attributed to the fairly slow speed of the Williams tubes (or, more accurately, Williams-Kilburn tubes) used for main memory of 256 words. Forrester started looking at replacements, first using magnetic tape formed into spirals, even at one time considering using a 3-D array of neon lamps, and eventually creating core memory. Speed was roughly doubled (40 KIPS) as a result of using core when the new version was completed in 1953. The addition time was 49 microseconds and the multiplication time was 61 microseconds (before the main memory was converted to magnetic core). | Speed of the original design (20 KIPS) turned out to be too slow to be very useful, and most of the problem was attributed to the fairly slow speed of the Williams tubes (or, more accurately, Williams-Kilburn tubes) used for main memory of 256 words. Forrester started looking at replacements, first using magnetic tape formed into spirals, even at one time considering using a 3-D array of neon lamps, and eventually creating core memory. Speed was roughly doubled (40 KIPS) as a result of using core when the new version was completed in 1953. The addition time was 49 microseconds and the multiplication time was 61 microseconds (before the main memory was converted to magnetic core). | ||
After the magnetic core memory was installed, the Whirlwind became the fastest computer of its time. With the change it had an addition time of 8 microseconds, a multiplication time of 25.5 microseconds, and a division time of 57 microseconds (excluding memory access time). The access time had been about 16 microseconds for the CRT memory which was reduced to only 8 microseconds with the magnetic core. | After the magnetic core memory was installed, the Whirlwind became the fastest computer of its time. With the change it had an addition time of 8 microseconds, a multiplication time of 25.5 microseconds, and a division time of 57 microseconds (excluding memory access time). The access time had been about 16 microseconds for the CRT memory which was reduced to only 8 microseconds with the magnetic core. | ||
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FURTHER READING | |||
Redmond, Kent, and Thomas Smith. Project Whirlwind: The History of a Pioneer Computer. Bedford, MA: Digital Press, 1980. | |||
Everett, Robert R. A History of Computing in the Twentieth Century, chapter on Whirlwind. Academic Press, 1980. | |||
Wildes, Karl, and Nilo Lindgren. A Century of Electrical Engineering and Computer Science at MIT, 1882-1982, chapter 17 "From Whirlwind to SAGE,” 280-301. Cambridge: MIT Press, 1985, pages 280-301.|a5=TECHNICAL DESCRIPTION | |||
By 1947, Forrester and collaborator Robert Everett completed the design of a high-speed stored-program computer. Most computers of the era operated in "bit-serial" mode, using single-bit arithmetic and feeding in large words, often 48 or 60 bits in size, one bit at a time. This was simply not fast enough for their purposes, so Whirlwind included sixteen such math units, operating on a complete 16-bit word every cycle in "bit-parallel" mode. Ignoring memory speed, Whirlwind was essentially sixteen times as fast as other machines. Today almost all CPUs do arithmetic in "bit-parallel"; some CPUs extend the idea to larger 32- or 64-bit words. | |||
The word size was selected after some deliberation. The machine worked by passing in a single address with almost every instruction, thereby reducingFact|a6=|a7=|a8=No|a9=|a10=|a11=No|a12=|a13name=|a13section=|a13position=|a13email=|a14name=|a14ou=|a14position=|a14email=|a15Aname=|a15Aemail=|a15Aname2=|a15Aemail2=|a15Bname=|a15Bemail=|a15Bname2=|a15Bemail2=|a15Cname=|a15Ctitle=|a15Corg=|a15Caddress=|a15Cphone=|a15Cemail=}} | |||
