Edit Proposal: Milestone-Proposal:MPD7720 DSP You do not have permission to edit this page, for the following reason: You are not currently logged in. The action you have requested is limited to users in the group: Users. Please log in or create an account. Docket ID: (admins only) Thank you for proposing a technical achievement for possible recognition as an IEEE Milestone in Electrical Engineering and Computing. Your efforts help preserve the heritage of technology. Detailed information on the Milestone application process may be found at: Milestone Guidelines and How to Propose a Milestone. At least one of the proposer(s) must be an IEEE Member (including Student Member) in good standing. To the proposer’s knowledge, is this achievement subject to litigation? If the answer is "yes", the proposal cannot proceed further. Yes No You must be able to answer "yes" to all of the following questions. If the answer to any of the following questions is "no", the proposal cannot proceed further. Contact us at firstname.lastname@example.org if you are unable to answer "yes" to all of the following and would still like to proceed. Is the achievement you are proposing more than 25 years old? Yes No Is the achievement you are proposing within IEEE’s designated fields as defined by IEEE Bylaw I-104.11, namely: Engineering, Computer Sciences and Information Technology, Physical Sciences, Biological and Medical Sciences, Mathematics, Technical Communications, Education, Management, and Law and Policy. Yes No Did the achievement provide a meaningful benefit for humanity? Yes No Was it of at least regional importance? Yes No Has an IEEE Organizational Unit agreed to pay for the milestone plaque(s)? Yes No Has an IEEE Organizational Unit agreed to arrange the dedication ceremony? Yes No Has the IEEE Section in which the milestone is located agreed to take responsibility for the plaque after it is dedicated? Yes No Has the owner of the site given permission to place an IEEE plaque? Yes No Year or range of years in which the achievement occurred: Title of the proposed milestone. (Include date or date range in title. Example: “Alternating Current Electrification, 1886”) Please provide a plaque citation in English summarizing the achievement and its significance. Text absolutely limited by plaque dimensions to 70 words; 60 is preferable for aesthetic reasons. NOTE: The IEEE History Committee shall have final determination on the wording of the citation. Names of living persons are not normally used in citations. Exceptions to this are cases where the person's name is linked to the achievement itself (e.g. the Lempel-Ziv algorithm, Maxwell's Equations, etc.) or where the person's name is so widely recognizeable to the general public that it makes sense to use it. When used, the names should be the names of the engineers, scientists, or technologists who actually made the achievement, rather than managers or executives. For more information and suggestions about writing milestone citations, please visit Helpful Hints on Citations, Plaque Locations. In 1980, NEC (formerly Nippon Electric Company) developed here the first commercially available, programmable digital signal processor chip, the μPD7720. Its novel bus structure, 250-nsec instruction cycle, and 16-bit multiplier enabled fast finite impulse response filtering and provided true real-time processing for complex systems. It accelerated the adoption of digital signal processing in communications and broadcasting. In what IEEE section(s) will the milestone plaque(s) reside? Please specify the IEEE Organizational Unit(s) which have agreed to sponsor the Milestone, and supply name and contact information for the senior officer from those OU(s). Sponsorship has three aspects: 1) Payment for the cost of the plaque(s), 2) Arranging the dedication ceremony, and 3) agreeing to monitor the plaque and to let IEEE History Center staff know in case the plaque needs to be moved, is no longer secure, etc. Number 3 must be done by the IEEE Section(s) in which the plaque(s) is located, but aspects 1 and 2 can be done by any IEEE Organizational Unit, and they need not be the same one. Please note: your email address and contact information will be masked on the website for privacy reasons. Only IEEE History Center Staff will be able to view the email address. IEEE Organizational Unit(s) paying for milestone plaque(s) Unit: Senior Officer Name: E-mail: Unit: Senior Officer Name: E-mail: IEEE Organizational Unit(s) arranging the dedication ceremony Unit: Senior Officer Name: E-mail: Unit: Senior Officer Name: E-mail: IEEE section(s) monitoring the plaque IEEE Section: IEEE Section Chair name: IEEE Section Chair e-mail: IEEE Section: IEEE Section Chair name: IEEE Section Chair e-mail: Milestone proposer(s) Proposer name: Proposer email: Proposer name: Proposer email: Proposer name: Proposer email: Street address(es) and GPS coordinates of the intended milestone plaque site(s). Please include coordinates in decimal format rather than degrees. What is the intended site(s) of the milestone plaque(s) relation to the achievement? The intended site(s) must have a direct connection with the achievement (e.g. where developed, invented, tested, demonstrated, installed, or operated, etc.). A museum where a device or example of the technology is displayed, or the university where the inventor studied, are not, in themselves, sufficient connection for a milestone plaque. Also, please Describe briefly the intended site(s) of the milestone plaque(s). (e.g. Is it corporate buildings? Historic Site? Residential? Are there other historical markers already at the site?) Are the original buildings extant? Please provide the details of the mounting, i.e. on the outside of the building, in the ground floor entrance hall, on a plinth on the grounds, etc. How is the intended plaque site protected/secured, and in what ways is it accessible to the public? If visitors to the plaque site will need to go through security, or make an appointment, please give details as well as the contact information visitors will need in order to arrange to visit the plaque. Who is the present owner of the site(s)? In the space below, please describe in detail: the historic significance of the achievement, its importance to the evolution of electrical and computer engineering and science, its importance to regional/national/international development, its benefits to humanity, the ways the achievement was a significant advance rather than an incremental improvement of existing technology. The material submitted here will constitute the main descriptive article on the ETHW website for readers to learn about the milestone. Space is unlimited, and detail is encouraged. Most milestones require 1000 to 1500 words of support, however there is no word limit. The article should be readable by a wide audience that includes practicing engineers, scholars of history, and the general public. Some examples of the text of good milestone articles are First Radio Astronomical Observations Using Very Long Baseline Interferometry] and G3_Facsimile International Standardization of G3 Facsimile (Do not worry about the formatting of the page, IEEE History Center Staff will do that afterwards.) What is the historical significance of the work (its technological, scientific, or social importance)? PD7720 is the first “commercially available” digital signal processor (DSP) chip in the world. It was presented at IEEE International Solid-State Circuits Conference (ISSCC)  and IEEE International Conference on Acoustic, Speech, and Signal Processing (ICASSP)  in 1980. In the same session of these conferences, another DSP developed by AT&T Bell Laboratories was presented [3, 4]. PD7720 was released in the market in 1980 [5-11] before the AT&T chip became available as DSP-20 only for AT&T’s internal use . Texas Instruments (TI), which is recognized as the leader in the DSP market, announced its first DSP, TMS32010, in 1982 [13, 14]. However, it was necessary to wait for two more years until TMS32010 was released in the market until 1984 . PD7720 had been the only DSP commercially available in the market until TMS32010 was released. PD7720 was used to implement an ADPCM (adaptive differential pulse code modulation) codec of a palm size . Because the tiny ADPCM codec board significantly impressed the ICASSP attendees, NEC was invited to join ITU-T (formerly CCITT) ADPCM standardization. In the course of standardization including evaluation by hardware, the flexibility (programmability) of PD7720 greatly helped establish the standard algorithm in the short period as originally planned. The resulting ADPCM standard includes floating-point multiplication which could not be implemented by the conventional DSPs. PD7720 was modified to make a new DSP, PD7730, with an 8x8 bit multiplier and a barrel shifter to implement floating-point multiplication essential to the ITU-T ADPCM standard [16, 17]. Because PD7720 had been available in the market since 1980 [5, 10, 11], there were a wide range of users in the world. The first user was Massachusetts Institute of Technology (MIT) whose paper on vocoder (low-bitrate speech encoder) first presented in May 1982  and published with extensions in February 1983 . μPD7720 was also used in speech synthesis  in those days. The biggest market for μPD7720 was modems  where an EPROM (erasable programmable ROM) version, μPD77P20 announced in 1981, was often used and the peak market share was over 90% . A DSP with efficient pipeline operations suitable for modems was also developed in 1982 based on μPD7720 . This chip allowed multiprocessor connection with no external logic. In the late 1980s, a shrunk CMOS version with an 8 MHz clock and an extended RAM, μPD77C25, was put in the market. μPD7720 is the origin of these descendent DSPs in the following years for various applications. μPD7720 as well as its family chips enabled realtime signal processing in the 1980s, leading to cost reduction and spreading of technology based on signal processing. Included, but not limited to, are digital transmission signal modulation, speech, audio, and video coding, speech recognition/synthesis, signal enhancement/interference cancellation to name a few. From a viewpoint of products, telecommunication equipment such as switches and transmission terminals, multimedia players such as Walkman, mobile phone handset including smartphones, digital cameras and camcorders, digital TV receivers, car navigation systems, DVD recorders/players, PCs and tablet PCs are implemented by DSPs or DSP cores. We cannot live for a second without digital signal processors. What obstacles (technical, political, geographic) needed to be overcome? The biggest obstacle was multiplications. The instruction cycle of microprocessors in those days was 4 MHz. It means that only 40 thousand 16x16-bit multiplications/sec was feasible, each of which requires many shift operations and accumulations. This obstacle was overcome by a parallel connection of the 16x16-bit Booth multipliers  which necessitates half of the full adders compared to the conventional multipliers. To accommodate all necessary components, the chip had a 512 word x 13 bit data ROM, a 512 word x 23 bit instruction ROM, and a 128 word x 16 bit RAM in addition to the 16x16-bit multiplier, assuming voiceband signal processing. A maximum computational performance was guaranteed by memory address controllers and data bus connections. RAM/ROM address registers were implemented as a counter to eliminate load of a new value. The RAM had a ring buffer structure such that data transfer could be replaced by address count-up/down. The data at two addresses in the RAM could be transferred to the multiplier in parallel for multiplication in a single instruction cycle . A past value of the ALU (arithmetic logical unit) and the output of the multiplier were provided with the ALU input for accumulation. A 23-bit word length of the instruction ROM enabled as many as six simultaneous operations, namely, update of two addresses, transfer of two data from the memories to the multiplier, transfer of the multiplier output to the ALU, and accumulation in the ALU. The 16x16-bit parallel multiplier and a novel data bus connections made it possible to efficiently perform multiply-and-add operations or, in another word, calculate an inner product of vectors. Filtering and Fourier Transform, which are both essential to typical signal processing applications such as a DTMF (dual-tone multi-frequency) receiver and an ADPCM codec (coder and decoder), consist of multiple multiply-and-add operations. The chip architecture design had been completed within a few weeks  to win the commercial market. What features set this work apart from similar achievements? Their commercial availability and fast multiplication with a novel data bus structure. Close collaboration between the research laboratory and the product division made μPD7720 commercially available soon after its announcement in 1980 [5, 10, 11], whereas AT&T’s DSP-20 was made available only within the company . TI’s TMS32010 came into the market a couple of years later than μPD7720 . Worldwide researchers and engineers benefit from flexibility of μPD7720 and its family chips, including an EPROM version announced in 1981, through quick prototyping of their algorithms and evaluation in realtime . Compared to AT&T’s DSP-20, μPD7720 provides four-fold speedy multiplication due to single-clock multiplication capability [1, 2, 11, 26], leading to the true realtime processing for complex systems. A single-clock 16x16 bit multiplication, completed within a single instruction cycle of 250 nsec, and faster FIR (finite impulse response) filtering, which is one of the most common operations in signal processing including Fourier Transform, were significant advantages of NEC’s μPD7720. DSP-20 had a 4x20-bit partial multiplier and needs four times the instruction cycle, totaling 800 nsec to complete 16x20-bit multiplication [4, 27]. The fast multiplication of μPD7720 was made available by a 16x16-bit full multiplier and a novel multi-bus structure [1, 2, 11, 26]. Two input data could be supplied with the multiplier simultaneously via different buses so that it was not necessary to wait for the other data to arrive in the next instruction cycle [11, 26]. A novel data pointer structure, which consists of a 3-bit modifier register and a 4-bit counter, replaced time consuming data transfers in the tapped delay line of an FIR filter through the bus with a ring buffer and its start address shift. The 3-bit modifier register enabled a jump to one of the eight pages of the RAM and the 4-bit counter enabled a sequential access to continuous memory addresses in the tapped delay line. Supporting texts and citations to establish the dates, location, and importance of the achievement. You must supply the texts or excerpts themselves, not just the references. Minimum of five (5), but as many as needed to support the milestone, such as patents, contemporary newspaper articles, journal articles, or chapters in scholarly books. At least one of the references must be from a scholarly book or journal article. 'Scholarly' is defined as peer-reviewed, with references, and published. The full reference, in English, must be uploaded, not just the citation. See below section for details on uploading material to the website. All supporting materials must be in English, or accompanied by an English translation. 1. Y. Kawakami, T. Nishitani, E. Sugimoto, E. Yamauchi, M. Suzuki, “A single-chip digital signal processor for voiceband applications,” Proc. ISSCC, WAM 3.2, pp. 40-41, February 1980. 2. T. Nishitani, Y. Kawakami, R. Maruta, A. Sawai, “LSI signal processor development for communications equipment,” Proc. ICASSP80, pp. 386-389, April 1980. 3. J. R. Boddie, G. T. Daryanani, I. I. Eldumiati, R. N. Gadenz, J. S. Thompson, S. M. Walters, and R. A. Pedersen, “A digital signal processor for telecommunications applications,” Digest of Tech. Papers, ISSCC, WAM 3.4, pp.44-45, Feb. 1980. 4. J. S. Thompson and J. R. Boddie, “An LSI digital signal processor,” Proc. ICASSP, pp. 383-385, Apr. 1980. 5. “Digital signal processing: NEC developed a fast micro-processor,” Nikkei Sangyo Shimbun (Japan Economic Industry Press), Feb. 14, 1980. (in Japanese) 6. “Microcomputer for digital signals: NEC made it on a single chip,” Nikkan Kogyo Shimbun (Daily Industry Press), Feb. 14, 1980. (in Japanese) 7. “Versatile and Economical: NEC developed a single-chip microcomputer for telecommunication,” Nihon Kogyo Shimbun (Japan Industry Press), Feb. 14, 1980. (in Japanese) 8. “Telecom-specific microcomputer developed by NEC: Single-chip and high-speed,” Denki Shimbun (Electrical News), Feb. 14, 1980. (in Japanese) 9. “NEC developed a telecom-specific single-chip microcomputer: At a price of 20K Yen,” Dempa Shimbun (Radio News), Feb. 18, 1980. (in Japanese) 10. NEC “μPD7720 Digital Signal Processing Interface,” Data Sheet, 1981. 11. R. Maruta, “At the dawn of the digital signal processing era, My association with Dr. Takao Nishitani,” IEEE Solid-State Circuits Magazine, Vol. 9, Issue 2, pp.25-29, Spring 2017. 12. T. Nishitani, “The advent of DSP and its growth in human society – Part 1,” IEICE Fundamental Review, Vol. 1, No. 4, pp. 17-29, Apr. 2008. (in Japanese) 13. S. S. Magar, E. R. Caudel, and A. W. Leigh, “A microcomputer with digital signal processing capability,” Digest of Tech. Papers, ISSCC, WAM 2.5, pp. 32-33, 284-285, Feb. 1982. 14. E. R. Caudel, R. K. Hester, and K-S. Tan, “A chip set for audio frequency digital signal processing,” Proc. ICASSP, pp. 1065-1068, April 1982. 15. T. Nishitani, S. Aikoh, T. Araseki, K. Ozawa, and R. Maruta, “A 32 kb/s toll quality ADPCM codec using a single chip signal processor”, Proc. of ICASSP, pp.960-963, April 1982. 16. M. Sato, Y. lshikawa, T. Nishitani, T. Kato, H. Saita, and Y. Aoki, “A single chip signal processor for CCITT standard ADPCM codec,” Digest of ISSCC, THPM 14.7, pp. 192-193, Feb. 1985. 17. T. Nishitani, I. Kuroda, M. Satoh, T. Katoh, R. Fukuda and Y. Aoki, “A CCITT standard 32 kbps ADPCM LSI codec”, Proc. of ICASSP, pp.1425-1428, April 1985. 18. J. A. Feldman, "A compact digital channel vocoder using commercial devices," ICASSP 1982, Vol. 7, pp1960-1963, May 1982. 19. J. A. Feldman, E. M. Hofstetter, and M. L. Malpass, “A compact, flexible LPC vocoder based on a commercial signal processing microcomputer,” IEEE Trans. ASSP, Vol. ASSP-31, No. 1, pp. 252-257, Feb. 1983. (Submitted on Aug. 17, 1982) 20. D. J. Quarmby and J. N. Holmes, “Implementation of a parallel-formant speech synthesizer using a single-chip programmable signal processor,” IEE Proceedings F, Vol. 131, Issue 6, pp. 563-569, Oct. 1984. 21. R. W. Cain, “Microprocessor Based 9600 BPS Modem,” Proc. ICASSP1985, 42.9, pp. 1633-1636, Apr. 1985. 22. Y. Kawakami, “Development of a digital signal processor,” Journal of the Society of Semiconductor Industry Specialists, No. 75, pp. 13-16, Apr. 2012. (in Japanese) 23. M. Yano, K. Inoue, and T. Senba, “An LSI digital signal processor,” Proc. ICASSP1982, pp. 1073-1076, May 1982. 24. T. Nishitani, “Two-term vector multiplier,” USP4215417, July 29, 1980 (Filed Jan. 27, 1978 [JP]). 25. T. Nishitani, “Sampled data processing system having memory with areas alternately dedicated to data I/O and data processing,” USP4287558, September 1, 1981 (Filed Sep. 29, 1977 [JP]). 26. T. Nishitani, R. Maruta, Y. Kawakami, H. Goto, “A single-chip digital signal processor for telecommunication applications,” IEEE J. of Solid-State Circuits, Vol. SC-16, No. 4, pp. 372-376, August 1981. 27. J. Boddie, “A brief history of AT&T’s first digital signal processor, Technology challenges in its development,” IEEE Solid-State Circuits Magazine, Vol. 9, Issue 2, pp.14-18, Spring 2017. Supporting materials (supported formats: GIF, JPEG, PNG, PDF, DOC) which can be made publicly available on the IEEE History Center’s website (i.e. unencumbered by copyright, or with the copyright holder’s permission). All supporting materials must be in English, or if not in English, accompanied by an English translation. You must supply the texts or excerpts themselves, not just the references. Images and photographs are especially appreciated, however, it is necessary that you list the copyright owner for these and obtain the copyright owner’s permission to reuse. For documents that are copyright-encumbered, or which you do not have rights to post, email the documents themselves to email@example.com. Please see the Milestone Program Guidelines for more information. To add attachments, first upload the file and add by adding the text: [[Media:(filename)]] For example, if the file you uploaded was named "Milestone Reference.pdf", include the text: [[Media:Milestone Reference.pdf]] in the appropriate field. A. A. Sengupta, “Takao Nishitani and John S. Thompson receive the 2017 IEEE Donald O. Pederson Award in Solid-State Circuits,” IEEE Solid-State Circuits Magazine, Vol. 9, Issue 1, pp.65-66, Winter 2017. B. R. Jain, “The 2017 IEEE Donald O. Pederson Award Winners,” IEEE Solid-State Circuits Magazine, Vol. 9, Issue 2, pp. 13 and 40, Spring 2017. C. K. K. Parhi, “Takao Nishitani, An outstanding researcher, technical leader, and mentor,” IEEE Solid-State Circuits Magazine, Vol. 9, Issue 2, pp. 35-37, Spring 2017. D. H. Harasaki, “Real-time programmable DSPs for video processing, The challenges of their development,” IEEE Solid-State Circuits Magazine, Vol. 9, Issue 2, pp.30-34, Spring 2017. E. A picture of μPD7720 and μPD77P20. Please email a jpeg or PDF a letter in English, or with English translation, from the site owner(s) giving permission to place IEEE milestone plaque on the property, and a letter (or forwarded email) from the appropriate Section Chair supporting the Milestone application to firstname.lastname@example.org with the subject line "Attention: Milestone Administrator." Note that there are multiple texts of the letter depending on whether an IEEE organizational unit other than the section will be paying for the plaque(s). Submit this proposal to the IEEE History Committee for review. Only check this when the proposal is finished Summary: This is a minor edit Watch this page Cancel Retrieved from "http://ieeemilestones.ethw.org/Milestone-Proposal:MPD7720_DSP"