Milestone-Proposal:Intel 4004 Microprocessor

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Docket #:2020-04

This proposal has been submitted for review.


To the proposer’s knowledge, is this achievement subject to litigation? No

Is the achievement you are proposing more than 25 years old? Yes

Is the achievement you are proposing within IEEE’s designated fields as defined by IEEE Bylaw I-104.11, namely: Engineering, Computer Sciences and Information Technology, Physical Sciences, Biological and Medical Sciences, Mathematics, Technical Communications, Education, Management, and Law and Policy. Yes

Did the achievement provide a meaningful benefit for humanity? Yes

Was it of at least regional importance? Yes

Has an IEEE Organizational Unit agreed to pay for the milestone plaque(s)? Yes

Has an IEEE Organizational Unit agreed to arrange the dedication ceremony? Yes

Has the IEEE Section in which the milestone is located agreed to take responsibility for the plaque after it is dedicated? Yes

Has the owner of the site agreed to have it designated as an IEEE Milestone? Yes


Year or range of years in which the achievement occurred:

1971

Title of the proposed milestone:

Intel 4004 Microprocessor, 1971

Plaque citation summarizing the achievement and its significance:

Built using new silicon-gate MOS technology, the Intel 4004 microprocessor incorporated a 4-bit computer's Central Processing Unit (CPU) onto a single chip, with cost and performance improvements over existing multi-chip designs. Although initially created for a family of calculating machines, its single-chip design, allowing software customization using a general-purpose instruction set, created the industry model for the microprocessor — a key driver of the digital information age.

In what IEEE section(s) does it reside?

Santa Clara Valley

IEEE Organizational Unit(s) which have agreed to sponsor the Milestone:

IEEE Organizational Unit(s) paying for milestone plaque(s):

Unit: Santa Clara Valley
Senior Officer Name: Taylor Winship

IEEE Organizational Unit(s) arranging the dedication ceremony:

Unit: Santa Clara Valley
Senior Officer Name: Taylor Winship

IEEE section(s) monitoring the plaque(s):

IEEE Section: Santa Clara Valley
IEEE Section Chair name: Tayor Winship

Milestone proposer(s):

Proposer name: David Laws
Proposer email: Proposer's email masked to public

Proposer name: Brian Berg
Proposer email: Proposer's email masked to public

Please note: your email address and contact information will be masked on the website for privacy reasons. Only IEEE History Center Staff will be able to view the email address.

Street address(es) and GPS coordinates of the intended milestone plaque site(s):

Robert N. Noyce Building (Intel's Headquarters), 2200 Mission College Blvd, Santa Clara, CA 95054 USA 37.3882663, -121.9637798

Describe briefly the intended site(s) of the milestone plaque(s). The intended site(s) must have a direct connection with the achievement (e.g. where developed, invented, tested, demonstrated, installed, or operated, etc.). A museum where a device or example of the technology is displayed, or the university where the inventor studied, are not, in themselves, sufficient connection for a milestone plaque.

Please give the address(es) of the plaque site(s) (GPS coordinates if you have them). Also please give the details of the mounting, i.e. on the outside of the building, in the ground floor entrance hall, on a plinth on the grounds, etc. If visitors to the plaque site will need to go through security, or make an appointment, please give the contact information visitors will need. By the entrance to the Intel Museum, which is accessible from the ground floor lobby of the Robert N. Noyce Building (Intel's Headquarters).

Are the original buildings extant?

The 4004 development work was performed at Intel's original headquarters at 365 E. Middlefield Rd., Mountain View, CA, which is not extant. The engineering design team moved to Intel's new headquarters at 3065 Bowers Ave., Santa Clara, CA (later called Santa Clara 1, or "SC1") in 1971, prior to the November 1971 product launch. This left only the Fab 1 facility in Mountain View, where the MCS-4 Micro Computer Chip Set was manufactured for at least its first year of production. SC1 is extant and retains the SC1 designation, is no longer Intel's Headquarters, and is not accessible to the public. SC1 is 2.1 miles from the Intel Museum site.

Details of the plaque mounting:

Indoors in a location adjoining the Intel Museum's entrance.

How is the site protected/secured, and in what ways is it accessible to the public?

The Intel Museum is open to the public during normal business hours. There is no charge for entry.

Who is the present owner of the site(s)?

Intel Corporation

What is the historical significance of the work (its technological, scientific, or social importance)?

The Intel 4004 was a complete 4-bit parallel central processing unit (CPU) on a single silicon chip. Introduced in 1971 as a member of the MCS-4 Micro Computer Chip Set, it was the first commercial microprocessor integrated circuit offered to the general public. The success of the product established the commercial viability of the microprocessor concept, led to the development of 8-bit chips from Intel and other vendors, and also led to the use of microprocessors first in embedded products, personal computers, and then throughout the industry. Single-chip microprocessors are now ubiquitous throughout the world.

Development work began in 1969 when Japanese calculator-maker Busicom asked Intel to design a set of chips for a family of calculators. The original design called for seven custom chips, out of which small computers based on ROM and shift register read-write memory could be built. Three of the seven chips were intended to perform the function of a CPU optimized for a variety of calculating machines. Ted Hoff saw the opportunity to simplify this approach by using dynamic RAM memory then in development at Intel. His proposed solution was an architecture for a single-chip, general-purpose CPU and three companion chips for memory and I/O.

As described in the <a href="https://www.computerhistory.org/siliconengine/silicon-gate-technology-developed-for-ics/" target="_blank">Computer History Museum's 1968: SILICON GATE TECHNOLOGY DEVELOPED FOR ICS webpage</a>, Federico Faggin developed enhancements to MOS technology that allowed the general-purpose processor that was being developed under contract to Busicom to be miniaturized enough so as to fit onto a single chip: "Intel pursued silicon-gate as the primary technology for semiconductor memories as it delivered 3 to 5 times faster speed in half the chip area of conventional MOS. Intel's first commercial MOS device, the 1101 256-bit RAM, was introduced in 1969. Faggin joined Intel in 1970. By adding a buried contact and other process enhancements for logic applications he was able to design the 4004 microprocessor CPU to fit on a manufacturable die size."  This is further described in the <a href="https://www.computerhistory.org/siliconengine/microprocessor-integrates-cpu-function-onto-a-single-chip/" target="_blank">Computer History Museum's 1971: MICROPROCESSOR INTEGRATES CPU FUNCTION ONTO A SINGLE CHIP webpage</a>.

Cognizant of financial troubles at Busicom, and sensing the market potential of the product, Intel made what was perhaps the most important decision in the history of the company: they returned their $60,000 design fee to Busicom and agreed to sell them the chip set at a lower cost in exchange for Busicom's surrendering of its exclusive rights. Now with its complete ownership, Intel introduced the chip set to the world in November 1971 with an advertisement that touted "Announcing a new era of integrated electronics: A micro-programmable computer on a chip!"

Because electronic designers had never before had the ability to design a new compact computerized product with such a small set of chips while using software to quickly tailor and fine-tune its capabilities, an extensive campaign to educate the engineering community about the MCS-4 chip family was necessary. It began to find a home in control applications that included traffic lights and taxi meters. While these initial usages were relatively unsophisticated, they had a small footprint, were created at a low cost, and included functionalities that could be easily tweaked with software changes - a combination that had never before been possible in a computerized product.

What obstacles (technical, political, geographic) needed to be overcome?

The key technical obstacle was adapting Intel's P-channel silicon-gate MOS process to accommodate 2300 transistors in a chip size that was economical and practical to manufacture in volume. As discussed with reference to Federico Faggin in the 29 Sept 1969 issue of Electronics, the new direction in MOS technology at that time was the development of a self-aligned gate MOS process (to reduce parasitic capacitances) combined with a lower power supply voltage (from -24 volts to -15 volts) by reducing the maximum threshold voltage from -9 volts to -3.5 volts. This was accomplished for the first time in 1968 by using polysilicon instead of aluminum in the gate electrode. The result was a technology that, for the same power dissipation, resulted in (1) a 5x speed improvement, (2) reduced leakage current (by more than 100 times), (3) higher circuit density (especially for random logic designs) using the buried contact, which allowed fabricating an insulated contact between junctions and polysilicon, thereby resulting in half the chip area for the same function, and (4) higher reliability by using phosphorus gettering to reduce metal impurities, which was not possible with an aluminum gate. This increase in speed and functionality within a single chip allowed the 4004 to be a single-chip CPU, with a resultant improved cost and greatly improved performance, as compared with a multi-chip implementation.

The MCS-4 family consisted of: 4001 (ROM), 4002 (RAM), 4003 (Shift Register) and 4004 (CPU), and each device had a pin count of only 16. While this low pin count reduced manufacturing cost, it also necessitated a cumbersome 4-bit bi-directional data bus for the communication of 12-bit addresses and 8-bit instructions amongst these 4 devices, a scheme implemented using time-division multiplexing and a fixed 8-click time clock in which each of the 8 clicks had an agreed direction and purpose, and as further described in U.S. Patent 3,821,715. While performance thereby suffered by a factor of 2.5, the 5x speed and 2x size improvements enabled by the use of silicon-gate MOS technology (which also allowed the chip to be small enough to fit into a 16-pin package) resulted in a family of devices whose overall system functionality was not impaired. A similar approach was applied to the 18-pin 8008 (introduced in 1972), sacrificing speed and requiring 35 external ICs to interface the chip to memory and I/O. Using a 40-pin package, Intel's highly successful 8080 microprocessor finally replaced the 8008 in 1974.

The political and commercial obstacles at the time included initial reluctance by Intel management to promote a chip that would compete with products from the company’s existing customers, the reluctance of the market to grasp the power inherent in a single-chip CPU, and the lack of knowledge regarding how to use such a device. The latter two obstacles were overcome by way of extensive customer education programs, and new hardware and software development tools.

What features set this work apart from similar achievements?

By the late 1960s, designers were striving to integrate the CPU functions of a computer onto a handful of MOS LSI chips. Two notable examples are (1) in 1969, Lee Boysel created the Four-Phase Systems Inc. AL-1, an 8-bit CPU slice that was expandable to 32 bits, and (2) in 1970, Steve Geller and Ray Holt of Garrett AiResearch designed the MP944 20-bit chip set to implement the F-14A Central Air Data Computer on six chips. Both were multi-chip custom designs for specific applications.

The Intel 4004 was a general-purpose device that integrated more of the essential logical elements of a processor onto a single chip than what had been done previously. These functions included a program counter, instruction decode/control logic, the ALU, data registers, and the data path between these elements. Although originally designed to implement a family of programmable calculators by way of Intel's contract with the Japanese company Busicom, the 4004's general-purpose instruction set allowed it to be embedded in devices such as peripherals, terminals, process controllers, and test and measurement systems.

Supporting texts and citations to establish the dates, location, and importance of the achievement: Minimum of five (5), but as many as needed to support the milestone, such as patents, contemporary newspaper articles, journal articles, or chapters in scholarly books. 'Scholarly' is defined as peer-reviewed, with references, and published. You must supply the texts or excerpts themselves, not just the references. At least one of the references must be from a scholarly book or journal article. All supporting materials must be in English, or accompanied by an English translation.

1. HONORS
The Marconi Society's 1988 Marconi Prize to Federico Faggin "for his pioneering contributions to the implementation of the microprocessor, a principal building block of modern telecommunications" .
The 1988 Gold Medal for Science and Technology to Federico Faggin from the Italian Prime Minister.
The 1994 IEEE Computer Society's W. Wallace McDowell Award to Federico Faggin “for the development of the Silicon Gate Process, and the first commercial microprocessor” .
The 1996 National Inventors Hall of Fame inductees included Federico Faggin, Marcian E. (Ted) Hoff and Stanley Mazor, for the microprocessor.
The 1997 Kyoto Prize recipients included Federico Faggin, Marcian Edward Hoff, Jr. , Stanley Mazor and Masatoshi Shima in Advanced Technology: Electronics.
The 2000 Robert N. Noyce Award presented by the Semiconductor Industry Association to Federico Faggin, Stanley Mazor and Ted Hoff, "Inventors of the Microprocessor" .
The 2009 Computer History Museum Fellows included Federico Faggin, Marcian Edward "Ted" Hoff, Stan Mazor and Masatoshi Shima "for their work on the Intel 4004, the world’s first commercial microprocessor" .
The 2009 National Medal of Technology and Innovation recipients included Federico Faggin, Marcian E. Hoff, Jr. and Stanley Mazor, as presented by President Obama "for the conception, design and application of the first microprocessor, which was commercially adopted and became the universal building block of digital electronic systems, significantly impacting the global economy and people's day-to-day lives".

2. PATENTS RESULTING FROM 4004 DESIGN
Faggin, F. “Power supply settable bi-stable circuit” U.S. Patent 3,753,011
Hoff, Jr., M. E.; Mazor, Stanley; Faggin, Federico. "Memory System for a Multi-Chip Digital Computer" U.S. Patent 3,821,715

3. TECHNICAL ARTICLES, CONFERENCE PAPERS & BOOKS
"A faster generation of MOS devices with low thresholds is riding the crest of the new wave, silicon-gate IC's," Electronics (29 Sept 1969) pp. 88-89.
Faggin, F. and Hoff, M.E. "Standard parts and custom design merge in four-chip processor kit," Electronics (24 April 1972) pp. 112-116.
Altman, Laurence "Single Chip Microprocessors open up a New World of Applications," Electronics (18 April 1974) pp. 81-87.
Noyce, R., and Hoff, M. "A History of Microprocessor Development at Intel," IEEE Micro, Vol. 1, No. 1 (1981) pp. 8-21.
Faggin, F.; Hoff, M.E., Jr.; Mazor, S.; Shima, M. "The history of the 4004," IEEE Micro, Vol. 16, Issue 6 (December 1996) pp. 10-20.
Faggin, F., Shima, M., Hoff, M.E., Feeny, H., Mazor S. "The MCS4 - An LSI micro-computer system," IEEE 1972 Region Six Conference, IEEE Press (1972) pp. 8-11.
Intel MCS-4 Micro Computer Set Data Sheet, 1971 (12 pages).
Augarten, Stan. "The First Microprocessor - 4004," State Of The Art: A Photographic History of the Integrated Circuit, New Haven & New York: Ticknor and Fields, 1983, pp. 30-31.
Malone, Michael S. "The Microprocessor: A Biography," New York: Springer-Verlag TELOS, 1995, pp. 3-20.

4. INTERVIEWS & ORAL HISTORIES
Federico Faggin: An Interview Conducted by John Vardalas, IEEE History Center Interview #442, 27 May 2004.
Federico Faggin Oral History, interviewed by Gardner Hendrie (22 Sept 2004, 13 Dec 2004 and 3 March 2005), Computer History Museum Catalog # 102658025 .
Ted Hoff and Stan Mazor on their contributions to the Intel 4004, Ted Hoff and Stan Mazor interviewed by David Laws (20 Sept 2006), Computer History Museum Catalog #102657974
Oral History Panel on the Development and Promotion of the Intel 4004 Microprocessor, Federico Faggin, Hal Feeney, Ted Hoff, Stan Mazor and Masatoshi Shima, interviewed by Dave House, and edited by David Laws (25 April 2007), Computer History Museum Catalog #102658187

5. ONLINE VIDEOS
The Designer Behind the First Microprocessor: Federico Faggin (length: 4:19)
Ted Hoff, Inventor of the Microprocessor, Richard Newton Distinguished Innovator Lecture Series, U.C. Berkeley (8 Sept 2009) (length: 48:08)
Intel 4004 Microprocessor 35th Anniversary, Computer History Museum (13 Nov 2006) (length: 1:37:59)

6. BLOG, PHOTOS & MISC. DOCUMENTS
Who Invented the Microprocessor?, David Laws (20 Sept 2018) .
Intel: A Look Back on the Early Years: Photos from Intel in the Early 1970s .
Intel 1988 Annual Report: Includes historical outline and photos from Intel's first 20 years .
Photo of 4004 die .
1971: Microprocessor Integrates CPU Function on to a Single Chip - Silicon-Gate Process Technology and Design Advances Squeeze Computer Central Processing Units (CPU) Onto Single Chips, The Silicon Engine (30 May 2020) (includes a plethora of links, photos and citations related to the 4004, along with a nice overview) .
Unofficial Intel Archives Website: photos, annual reports, software, documentation, etc. .

7. VIDEODISC
The Microprocessor Chronicles: The History of the Microprocessor "The history of the invention of the microprocessors through three and half decades of technological change as told by those that made it happen. Interviews with Dennis Carter, Federico Faggin, John Hennessy, Ted Hoff, Dave House, Stan Mazor, Regis McKenna, Gordon Moore, Jerrt Sanders, Albert Yu," Stanford University Library; Palo Alto, CA, 2005

Supporting materials (supported formats: GIF, JPEG, PNG, PDF, DOC): All supporting materials must be in English, or if not in English, accompanied by an English translation. You must supply the texts or excerpts themselves, not just the references. For documents that are copyright-encumbered, or which you do not have rights to post, email the documents themselves to ieee-history@ieee.org. Please see the Milestone Program Guidelines for more information.


Please email a jpeg or PDF a letter in English, or with English translation, from the site owner(s) giving permission to place IEEE milestone plaque on the property, and a letter (or forwarded email) from the appropriate Section Chair supporting the Milestone application to ieee-history@ieee.org with the subject line "Attention: Milestone Administrator." Note that there are multiple texts of the letter depending on whether an IEEE organizational unit other than the section will be paying for the plaque(s).