Edit Proposal: Milestone-Proposal:First RISC Microprocessor You do not have permission to edit this page, for the following reason: You are not currently logged in. The action you have requested is limited to users in the group: Users. Please log in or create an account. Docket ID: (admins only) Thank you for proposing a technical achievement for possible recognition as an IEEE Milestone in Electrical Engineering and Computing. Your efforts help preserve the heritage of technology. Detailed information on the Milestone application process may be found at: Milestone Guidelines and How to Propose a Milestone. At least one of the proposer(s) must be an IEEE Member (including Student Member) in good standing. To the proposer’s knowledge, is this achievement subject to litigation? If the answer is "yes", the proposal cannot proceed further. None Yes No You must be able to answer "yes" to all of the following questions. If the answer to any of the following questions is "no", the proposal cannot proceed further. Contact us at firstname.lastname@example.org if you are unable to answer "yes" to all of the following and would still like to proceed. Is the achievement you are proposing more than 25 years old? Yes No Is the achievement you are proposing within IEEE’s designated fields as defined by IEEE Bylaw I-104.11, namely: Engineering, Computer Sciences and Information Technology, Physical Sciences, Biological and Medical Sciences, Mathematics, Technical Communications, Education, Management, and Law and Policy. Yes No Did the achievement provide a meaningful benefit for humanity? Yes No Was it of at least regional importance? Yes No Has an IEEE Organizational Unit agreed to pay for the milestone plaque(s)? Yes No Has an IEEE Organizational Unit agreed to arrange the dedication ceremony? Yes No Has the IEEE Section in which the milestone is located agreed to take responsibility for the plaque after it is dedicated? Yes No Has the owner of the site given permission to place an IEEE plaque? Yes No Year or range of years in which the achievement occurred: Title of the proposed milestone. (Include date or date range in title. Example: “Alternating Current Electrification, 1886”) Please provide a plaque citation in English summarizing the achievement and its significance. Text absolutely limited by plaque dimensions to 70 words; 60 is preferable for aesthetic reasons. NOTE: The IEEE History Committee shall have final determination on the wording of the citation. Names of living persons are not normally used in citations. Exceptions to this are cases where the person's name is linked to the achievement itself (e.g. the Lempel-Ziv algorithm, Maxwell's Equations, etc.) or where the person's name is so widely recognizeable to the general public that it makes sense to use it. When used, the names should be the names of the engineers, scientists, or technologists who actually made the achievement, rather than managers or executives. For more information and suggestions about writing milestone citations, please visit Helpful Hints on Citations, Plaque Locations. UC Berkeley students designed and built the first VLSI reduced instruction-set computer in 1981. The simplified instructions of RISC-I reduced the hardware for instruction decode and control, which enabled a flat 32-bit address space, a large set of registers, and pipelined execution. A good match to C programs and the Unix operating system, RISC-I influenced instruction sets widely used today, including those for game consoles, smartphones and tablets. In what IEEE section(s) will the milestone plaque(s) reside? Please specify the IEEE Organizational Unit(s) which have agreed to sponsor the Milestone, and supply name and contact information for the senior officer from those OU(s). Sponsorship has three aspects: 1) Payment for the cost of the plaque(s), 2) Arranging the dedication ceremony, and 3) agreeing to monitor the plaque and to let IEEE History Center staff know in case the plaque needs to be moved, is no longer secure, etc. Number 3 must be done by the IEEE Section(s) in which the plaque(s) is located, but aspects 1 and 2 can be done by any IEEE Organizational Unit, and they need not be the same one. Please note: your email address and contact information will be masked on the website for privacy reasons. Only IEEE History Center Staff will be able to view the email address. IEEE Organizational Unit(s) paying for milestone plaque(s) Unit: Senior Officer Name: E-mail: Unit: Senior Officer Name: E-mail: IEEE Organizational Unit(s) arranging the dedication ceremony Unit: Senior Officer Name: E-mail: Unit: Senior Officer Name: E-mail: IEEE section(s) monitoring the plaque IEEE Section: IEEE Section Chair name: IEEE Section Chair e-mail: IEEE Section: IEEE Section Chair name: IEEE Section Chair e-mail: Milestone proposer(s) Proposer name: Proposer email: Proposer name: Proposer email: Street address(es) and GPS coordinates of the intended milestone plaque site(s). Please include coordinates in decimal format rather than degrees. What is the intended site(s) of the milestone plaque(s) relation to the achievement? The intended site(s) must have a direct connection with the achievement (e.g. where developed, invented, tested, demonstrated, installed, or operated, etc.). A museum where a device or example of the technology is displayed, or the university where the inventor studied, are not, in themselves, sufficient connection for a milestone plaque. Also, please Describe briefly the intended site(s) of the milestone plaque(s). (e.g. Is it corporate buildings? Historic Site? Residential? Are there other historical markers already at the site?) Are the original buildings extant? Please provide the details of the mounting, i.e. on the outside of the building, in the ground floor entrance hall, on a plinth on the grounds, etc. How is the intended plaque site protected/secured, and in what ways is it accessible to the public? If visitors to the plaque site will need to go through security, or make an appointment, please give details as well as the contact information visitors will need in order to arrange to visit the plaque. Who is the present owner of the site(s)? In the space below, please describe in detail: the historic significance of the achievement, its importance to the evolution of electrical and computer engineering and science, its importance to regional/national/international development, its benefits to humanity, the ways the achievement was a significant advance rather than an incremental improvement of existing technology. The material submitted here will constitute the main descriptive article on the ETHW website for readers to learn about the milestone. Space is unlimited, and detail is encouraged. Most milestones require 1000 to 1500 words of support, however there is no word limit. The article should be readable by a wide audience that includes practicing engineers, scholars of history, and the general public. Some examples of the text of good milestone articles are First Radio Astronomical Observations Using Very Long Baseline Interferometry] and G3_Facsimile International Standardization of G3 Facsimile (Do not worry about the formatting of the page, IEEE History Center Staff will do that afterwards.) What is the historical significance of the work (its technological, scientific, or social importance)? In the 1970s, the general trend in in computer design was to increase the complexity of computer architectures. The thought was that this would best exploit the rapidly advancing capabilities of semiconductor technology. The popular DEC VAX 11-780 was the leading example. About 280 machine-language instructions were implemented in the VAX hardware. The VAX 11-780, a so-called super minicomputer, was advertised as exercising 1 million instructions/second and sold for about $100,000. This class of computers was then termed CISCs, or complex instruction set computers. Professors David Patterson and Carlo Sequin of the University of California at Berkeley observed that compilers for high-level computer languages, such as C, rarely utilized the added instructions. They thought that overall performance could be improved by optimizing the combination of processor function and memory on a single chip. Better overall performance at a much lower cost might be achieved by simplifying the processor, thereby allowing more chip area to be devoted to memory. Thus the goal was defined as a RISC, or reduced instruction set computer. The RISC-I project was initiated in 1980 with assignments in a sequence of graduate classes at Berkeley, aiming to validate the RISC hypothesis. Initial conclusions based on simulation were positive, so the project continued, with critical grant support from DARPA. Students designed a processor with just 31 instructions, each executed in a single clock cycle. Included on the same student-designed chip, were 78 32-bit registers. This was enough memory to enable one-cycle execution of a large fraction of the instructions in compiled code. Early in the project, the Berkeley team learned of previously unpublished work at IBM around 1975, led by Dr. John Cocke. The IBM 801, never commercialized, pioneered architectural principles similar to those independently chosen by the Berkeley team, though the goals for the 801 were quite different. Dr. Cocke visited Berkeley in 1981 and spoke to the student-faculty team. He gave them enthusiastic encouragement for their undertaking. The first student-designed RISC-I chips, realized via the DARPA and NSF-funded MOSIS implementation service, were received in the fall of 1981. They were functional, though with minor deficiencies. However, performance was sufficient to convince previous skeptics to recognize the merits of the RISC approach to design of very large scale integrated (VLSI) computing. After correction of minor design bugs, the RISC-I design proved to outperform the VAX on almost every real-world benchmark. No patents for the RISC-I design were sought for the Berkeley project. The earlier design of the IBM 801 might have been an impediment, though it had not been publicly disclosed. But the Berkeley team, funded primarily by government agencies, admirably chose to place their results in the public domain. This decision proved to be important to the later widespread adoption of the basic RISC concepts. The RISC design was first commercialized as the SPARC microprocessor, introduced in 1987. Professor Patterson served as a consultant to Sun Microsystems, assisting Sun in development of the powerful RISC-based SPARC workstations. The SPARC workstations became a leading tool in the design of integrated circuits. Sun is now a part of the Oracle Corporation. A similar project was carried on at about the same time at Stanford University, led by Professor John Hennessey. Professors Hennessey and Patterson are long-term friends and collaborators. They are co-authors of the leading textbook on computer architecture. The Stanford project produced a similar RISC processor design, termed MIPS. Also, there were important improvements to the compiler. The MIPS design was successfully commercialized by MIPS Computer Systems, founded by Professor Hennessey and others. That company subsequently was acquired by Silicon Graphics, Inc. The MIPS architecture is widely produced for a range of applications, under license from the company. Along another path, Advanced RISC Machines (ARM) in the UK developed a continuing series of VLSI RISC processor designs that now are produced under license by leading semiconductor manufacturers of chips for use in game consoles, smart phones, and tablet computers. You may well be carrying one of these products today. Not to be overlooked, the academic projects at Berkeley and Stanford educated scores of creative and talented Master’s degree and Doctoral students who became the next generation of technology leaders. What obstacles (technical, political, geographic) needed to be overcome? The largest obstacle in 1980 was skepticism among knowledgeable professionals, friendly or otherwise. No one on the team had prior experience designing VLSI computer processor chips. Professors Patterson and Sequin had the courage to continue. Of course, the work would not have been possible without the major support of DARPA and MOSIS. What features set this work apart from similar achievements? The IBM work begun in 1975, led by Dr. John Cocke, was aimed the control requirements for an electronic telephone central switch. That project influenced by Dr. Cocke’s recognition that compilers of that era rarely made use of complex high-level language instructions. A working model was built with off-the-shelf emitter-coupled logic (ECL) chips. There was no recognition of the benefit of combining many fast registers on the same chip as the central processor, and no attention to the possibility of an inexpensive single-chip microprocessor. The MIPS project, led by Prof. John Hennessey at Stanford, featured important attention to the role of the compiler in making best use of RISC processor resources. The first working chip resulting from that project came about a year after RISC-I at Berkeley. Supporting texts and citations to establish the dates, location, and importance of the achievement. You must supply the texts or excerpts themselves, not just the references. Minimum of five (5), but as many as needed to support the milestone, such as patents, contemporary newspaper articles, journal articles, or chapters in scholarly books. At least one of the references must be from a scholarly book or journal article. 'Scholarly' is defined as peer-reviewed, with references, and published. The full reference, in English, must be uploaded, not just the citation. See below section for details on uploading material to the website. All supporting materials must be in English, or accompanied by an English translation. Patterson, David A., and David R. Ditzel, "The case for the reduced instruction set computer." ACM SIGARCH Computer Architecture News 8.6 (1980): 25-33. Patterson, David A., and Carlo H. Sequin, "RISC I: A reduced instruction set VLSI computer." Proceedings of the 8th annual symposium on Computer Architecture, IEEE Computer Society Press, 1981. Patterson, David A., and Carlo H. Sequin, “Design and Implementation of RISC I” UC Berkeley EECS Technical Report CSD-82-106, 1982. (Also appeared in Proc. Advanced Course on VLSI Architecture, University of Bristol, England, July 19-30, 1982.) Patterson, David A., and Carlo H. Sequin, "A VLSI RISC." IEEE computer 15.9 (1982): 8-21. Digital Object Identifier: 10.1109/MC.1982.1654133 Sherburne, R. W., Katevenis, M. G., Patterson, D. A., & Sequin, C. H. (1984), “A 32-bit NMOS microprocessor with a large register file,” Solid-State Circuits, IEEE Journal of,19(5), 682-689. Digital Object Identifier: 10.1109/JSSC.1984.1052208 Patterson, David A. "Reduced instruction set computers." Communications of the ACM 28.1 (1985): 8-21. Supporting materials (supported formats: GIF, JPEG, PNG, PDF, DOC) which can be made publicly available on the IEEE History Center’s website (i.e. unencumbered by copyright, or with the copyright holder’s permission). All supporting materials must be in English, or if not in English, accompanied by an English translation. You must supply the texts or excerpts themselves, not just the references. Images and photographs are especially appreciated, however, it is necessary that you list the copyright owner for these and obtain the copyright owner’s permission to reuse. For documents that are copyright-encumbered, or which you do not have rights to post, email the documents themselves to email@example.com. Please see the Milestone Program Guidelines for more information. To add attachments, first upload the file and add by adding the text: [[Media:(filename)]] For example, if the file you uploaded was named "Milestone Reference.pdf", include the text: [[Media:Milestone Reference.pdf]] in the appropriate field. RISC1.jpeg (chip photo) Dave&Carlo.jpg RISC1group.jpg RISCCAD.jpg (3 photos of people) I have uploaded these, with captions. None is copyrighted. Please email a jpeg or PDF a letter in English, or with English translation, from the site owner(s) giving permission to place IEEE milestone plaque on the property, and a letter (or forwarded email) from the appropriate Section Chair supporting the Milestone application to firstname.lastname@example.org with the subject line "Attention: Milestone Administrator." Note that there are multiple texts of the letter depending on whether an IEEE organizational unit other than the section will be paying for the plaque(s). Submit this proposal to the IEEE History Committee for review. Only check this when the proposal is finished Summary: This is a minor edit Watch this page Cancel Retrieved from "http://ieeemilestones.ethw.org/Milestone-Proposal:First_RISC_Microprocessor"