File:US4949142 18 dec 1984.pdf

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Revision as of 16:59, 2 December 2019 by Danilopau (talk | contribs) (Patent number 4,949,142 Foreign Application Priority Data Dec. 18, 1984 (IT) Italy. 24.126 A/84 INTEGRATED N-CHANNEL POWER MOS BRIDGE CIRCUIT The disclosed bridge circuit is fabricated using power MOS technology. Common terminals of the bridge circuit...)
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US4949142_18_dec_1984.pdf(file size: 750 KB, MIME type: application/pdf)

Summary

Patent number 4,949,142 Foreign Application Priority Data Dec. 18, 1984 (IT) Italy. 24.126 A/84 INTEGRATED N-CHANNEL POWER MOS BRIDGE CIRCUIT The disclosed bridge circuit is fabricated using power MOS technology. Common terminals of the bridge circuit are integrated into common regions in the imple mentation. Electrodes, typically coupled together in the bridge circuit, are implemented by a shared conducting region in the integrated circuit of the semiconductor chip. By integrating the elements of the circuit, less area of the semiconductor chip is required as compared to an implementation involving 4 (four) discrete elements. Diodes are fabricated across the transistors to protect the elements against reverse biasing.

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current16:59, 2 December 2019 (750 KB)Danilopau (talk | contribs)Patent number 4,949,142 Foreign Application Priority Data Dec. 18, 1984 (IT) Italy. 24.126 A/84 INTEGRATED N-CHANNEL POWER MOS BRIDGE CIRCUIT The disclosed bridge circuit is fabricated using power MOS technology. Common terminals of the bridge circuit...

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